Integrated mass storage device

ABSTRACT

A integrated mass memory device is formed by combining a piezoelectric bimorph cantilever (214) with a recording surface (212) having a number of storage locations to and from which digital information is transferred using a scanning tunneling microscope or an atomic force microscope mode of operation. Controls circuits (240) are provided for controlling the scanning of the recording surface (212) and for writing and reading information into and from the recording surface. An image storage system stores images captured from an optical sensor using piezoelectric bimorph cantilevers for reading and writing digital information on recording surfaces.

The U.S. Government has a paid-up license in this invention and theright in limited circumstances to require the patent owner to licenseothers on reasonable terms as provided for by the terms of Contract No.N00014-84-K-0624 awarded by the Department of the Navy.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation-in-part of U.S. patent applicationSer. No. 149,236 filed Jan. 27, 1988, now U.S. Pat. No. 4,906,840, andassigned to the assignee of the present invention.

BACKGROUND OF THE INVENTION

1. Field of the Invention:

The invention pertains to the field of scanning tunneling microscopes,and more particularly, to the field of integrated versions of same.

Scanning tunneling microscopes were first invented by a team ofresearchers from IBM (Binnig and Rohrer). The basic concept of ascanning tunneling microscope is to place a very sharp, conducting tiphaving tip dimensions on the order of the size of 1 atom in diameterclose to a conductive surface. If the tip is brought very close to aconductive surface, i.e., within the space of the diameters of severalatoms, (approximately within 5 angstroms), a tunneling current flowsbetween the tip and the surface. That is, the probability densityfunction of electrons for atoms in the tip overlaps in space theprobability density function of electrons for atoms on the surface. As aresult, tunneling occurs in the form of electron current flow betweenthe tip and the surface if a suitable bias voltage between these twoconductors is applied.

The magnitude of the tunneling current is exponentially dependent uponthe distance between the tip and the surface. If the distance betweenthe tip and the surface increases by only 1 angstrom, the current isreduced by a factor of 10. Typically, 100 millivolts of bias voltagewill provide 1 nanoampere of current for a tip to sample spacing of afew angstroms.

This tunneling current phenomenon can be used to take an image of thesurface. To do this, the tip must be placed very close to the surfaceand must be moved in raster scan-like fashion across the surface whilemaintaining the relative distance between the tip and the surface. Thetip must be moved up and down to follow the contour of the surface tomaintain a relatively constant distance between the highest point on thesurface and the tip. This distance must be accurately maintained to bewithin the tunneling overlap distance to maintain constant current flow.As the tip is scanned across the contour of the surface, an image of thesurface contour may be built up by keeping track of the movements of thetip. Typically this process of tracking the tip movement is done bykeeping track of the voltage applied across a piezoelectric transducerwhich moves the tip to maintain the constant distance between the tipand the surface. Typically the apparatus that controls the tip distancemonitors the current flowing between the tip and the surface andcontrols a mechanical system to move the tip in such a manner as tostabilize the current flowing between the tip and the surface at somesteady state value. Thus, changes in the current will result in changesin the distance between the tip and the surface so as to counteract thechanges in the current and stabilize it at a steady state value. Thus,changes in the drive signals to the tip movement mechanism track changesin the surface contour as the height of the tip above the surface isadjusted to maintain constant current.

2. Prior Art:

A collection of papers defining the state of the art in scanningtunneling microscopy is published in the IBM Journal of Research andDevelopment, Vol. 30, No. 4, pages 353-440, July 1986. In an articleentitled "Scanning Tunneling Microscopy" by Binnig and Rohrer at pages355-369 of that journal, a scanning tunneling microscope is depicted inFIG. 2 using a piezoelectric tripod. This tripod consists of 3piezoelectric rods of material joined at a junction; each rod expandsand contracts along one of 3 Cartesian coordinate axes. The tip ismounted at the junction of the 3 rods. The tip is brought into proximityof the surface by a rough positioner. Thereafter the piezoelectrictripods are used to scan the tip across the surface to develop an imageof that surface. The collection of papers in the IBM Journal of Researchand Development shows scanning tunneling microscopy as being done withlarge scale apparatus.

One reference teaches an integrated form of a scanning tunnelingmicroscope. This reference is European Patent Application PublicationNo. 0194323A1 published Sep. 17, 1986 based on European Application85102554.4 filed Jul. 3, 1985. This patent application describes ascanning tunneling microscope integrated on a semiconductor chip intowhich slots are etched to form a center portion cantilever. The slotsare etched to have mutually orthogonal directions to allow the centerportion to perform movements in the X and Y direction under the controlof electrostatic forces created between the stripes defined by the slotsand their opposite walls. A protruding tip is formed on the centerportion which is capable of being moved in the Z direction by means ofelectrostatic forces. Electrostatic forces are not ideal for tipmovement to obtain maximum accuracy. Also, the integrated STM describedin the European Patent Application cited above would be difficult tosuccessfully fabricate.

Thus, a need has arisen for an integrated version of the scanningtunneling microscope using piezoelectric means for moving the tip.

Advances in the application of electronics technology has made itpossible to convert a two-dimensional optical image to a train ofelectrical signals. A common application of this technology is found theportable video cameras and recorders, or camcorders, wherein atwo-dimensional CCD array is used to scan an optical image and convertit to an electrical signal that is linear in time. In turn, theelectrical signal is stored on a magnetic tape of the form that iscommonly found in video recorders. The image is played back onto atelevision screen with the VCR. This system is large and bulky in spiteof the advances that have been made in size reduction.

SUMMARY OF THE INVENTION

According to the teachings of the invention, there is disclosed both anintegrated piezoelectric transducer of novel construction and anintegrated scanning tunneling microscope using this piezoelectrictransducer for the necessary tip movement. The piezoelectric transduceruses bimorph technology.

In one embodiment of the piezoelectric transducer, a layer of spacermaterial which will later be removed, is placed over the surface of asilicon or other substrate. Thereafter, a layer of conductive materialis formed on the spacer layer and patterned to form three separateelectrodes. Then a layer of piezoelectric material is formed over thethree electrodes and another layer of conductive material is formed overthe layer of piezoelectric material. A second layer of piezoelectricmaterial is then formed over the middle conductor. Finally, a thirdconductive layer is formed over the second piezoelectric material layerand is patterned to form three separate electrodes which are alignedwith the three electrodes of the bottom-most conductive layer. Then asharp, conductive tip is formed on the center electrode on the uppermostconductive layer. This tip is formed by evaporation deposition of aconductive material through a shadow mask. The evaporation depositionforms a cone of material of ever decreasing diameter on the center, topelectrode. The ever-decreasing diameter results as the material landingon the shadow mask slowly closes off the hole in the mask above thepoint where the tip is being formed.

After the foregoing structure is formed, the sides of the piezoelectricmaterial are etched away to form the bimorph lever. This etching isperformed in such a manner that sufficient piezoelectric material isleft on the sides to completely encase the center electrode. Thisetching of the piezoelectric material is done by first depositing alayer of titanium/tungsten metal and patterning this layer to act as anetch mask. This layer of metal is patterned using conventionalphotolithography techniques to define where the edge of thepiezoelectric material is to be. After the metal etch mask is formed,the zinc oxide piezoelectric material is etched using the metal mask asa guide. If other piezoelectric materials are used which may be etchedwith good resolution, this step of depositing and forming a metal etchmask may be eliminated. Zinc oxide is a piezoelectric material whichcannot easily be etched with good resolution. The step of forming themetal etch mask substantially improves the resolution which may beobtained in etching the zinc oxide material. "Resolution" as the term isused here is intended to specify the degree of control over the positionof the edge of the zinc oxide.

After the piezoelectric material has been etched, the spacer materialunderlying the entire structure is removed. This spacer material isremoved only up to the point where the cantilever bimorph is to bephysically attached to the substrate. Removal of the spacer materialcauses the bimorph cantilever to extend out from its attachment pointover the substrate with an air space between the bottom of the bimorphand the top surface of the substrate. This allows the bimorph to move upand down normal to the surface of the substrate by the effect of thepiezoelectric material thereby allowing the tip to be moved. Theexistence of four pairs of electrodes and two layers of piezo materialin this embodiment, allows three axis movement of the tip to beobtained.

To operate the structure just described so as to cause the tip to makeraster scanning movements, various voltage combinations are applied tothe four pairs of electrodes formed by the middle layer electrode andthe outer electrodes on the bottom and top electrode layers. By suitablycontrolling the voltages applied to these four electrode pairs, the tipmay be made to move along any of the three axes in a Cartesiancoordinate system.

In alternative embodiments, two such bimorph structures each having twopiezo layers but only two pairs of electrodes, formed as previouslydescribed, may be fabricated so as to extend out over the substrate fromtheir attachment points and to intersect each other at a 90° angle andto be joined at the intersection. These two bimorphs may then becontrolled in a similar manner to the manner described above for asingle bimorph to move the intersection point along any of the threeaxes of a Cartesian coordinate system. In an alternative embodiment, twoconductive tips may be formed at the end of the bimorph and the voltagesapplied to the electrodes may be manipulated so that the tip of thebimorph rotates to provide independent Z axis motion for each tip andsynchronous X and Y motion for both tips.

An alternative, and preferred, embodiment of the method for forming thebimorph piezoelectric transducer structure described above, is to formthe multilayer structure directly on a silicon substrate without anyspacer material as described above but to free the bimorph cantileverfrom the substrate by etching through to the under surface of thecantilevered bimorph from the back side of the wafer.

A scanning tunneling microscope according to the teachings of theinvention may be made by using any of the processes described herein tomanufacture a bimorph tip movement structure and then placing the tipsufficiently close to a conductive surface to be scanned such as byattaching to the substrate on which the bimorph is integrated anotherwafer containing the conductive surface to be scanned. Suitable knowncontrol circuitry may then be integrated on either substrate if it is ofsemiconductor material to sense the tunneling current and to control thevoltages applied to the electrodes of the bimorph.

The scanning tunneling microscope structures in integrated formdescribed herein have many potential applications including imaging atthe atomic level, atomic scale lithography and mass storage. Massstorage systems of very high density can be formed using such astructure by defining a discrete number of "cells" within the rasterscannable surface of a conductive plane formed adjacent to the tip. Eachcell constitutes one memory location. Each memory location is written asa 1 or 0 by depositing a molecule of sufficient size to be detected bythe scanning tunneling microscope within each cell to form a 1 and notdepositing such a molecule in the cell to form a 0. As the scanningtunneling microscope raster scans over such a surface, those cellswherein molecules are deposited are read as ones as the tip is forced byits control system to move away from the surface to maintain a steadytunneling current as the tip passes over the molecule. Essentially, themolecule forms a "hill" in an otherwise smooth surface. This hill causesthe distance between the tip and the top of the molecule to decrease,thereby substantially increasing the tunneling current. The controlsystem detects this increase and sends the appropriate voltages to thebimorph cantilever to cause the tip to move away from the surfacesufficiently to bring the tunneling current back down to the constantlevel for which the system is calibrated. This movement of the tip orchange in the voltages sent to the bimorph electrodes is detected andread as a logic 1. Other circuitry keeps track of the tip position andsignals as each new cell is traversed. Thus, such a movement of a tip asit traverses a particular cell can be read as a 1 and lack of movementas it traverses another cell can be read as a 0. Such mass storagesystems have the potential for tremendous information storage densitybecause of the small, atomic scale dimensions involved.

Imaging applications of such a scanning tunneling microscope provide theability to see the characteristics of surfaces on an atomic scale withgreater resolution than has heretofore been attained. This allows theexamination of such surfaces as semiconductor substrates during variousstages of processing for research and development or quality controlpurposes. Vast numbers of other applications will be appreciated bythose skilled in the art.

Piezoelectric bimorph cantilevers and the surfaces scanned therewith aremounted on the same silicon substrate to form scanning tunnelingmicroscopes or atomic force microscopes which are incorporated into massmemory devices. A recording surface has various locations at whichinformation is stored. Formed on the same substrate are control circuitsfor controlling scanning of the recording surface. Recording andplayback, or writing and reading of information, is accomplished byseveral alternative mechanisms, including STM and AFM techniques. Imagesensors, such as CCD devices, and signal processing circuits, such asanalog-to-digital converters and digital-to-analog converters are formedon the same substrate as the memory units provided by combination ofcantilever arms with recording surfaces.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a typical scanning tunneling microscope system.

FIGS. 2(a) and 2(b) are a view of a prior art discrete, large scalescanning tunneling microscope invented by IBM.

FIGS. 3-10 are successive cross sectional views along the transverseaxis of the bimorph cantilever of the intermediate stages in a firstprocess of fabrication of the preferred structure for an integratedsingle lever bimorph cantilever with tip for a scanning tunnelingmicroscope according to the teachings of the invention.

FIG. 11 is a cross sectional view of the final scanning tunnelingmicroscope preferred structure taken along the longitudinal axis of thebimorph cantilever.

FIG. 12 is a plan view of the one cantilever preferred bimorph structureaccording to the teachings of the invention.

FIG. 13 is a diagram of the four pairs of electrodes in the onecantilever bimorph used to explain how three axis motion is achieved.

FIG. 14 is a table of the various voltages that must be applied toachieve motion in any particular axis.

FIGS. 15-20 are cross sectional diagrams longitudinally through onebimorph of an alternative two bimorph piezoelectric transducer accordingto the teachings of the invention.

FIG. 21 is a transverse cross section of the bimorph construction in twobimorph embodiments.

FIG. 22 is a plan view of a two bimorph embodiment of the invention withno control circuitry integrated on the substrate.

FIGS. 23-33 are cross sectional views of intermediate stages in thepreferred process for construction of an integrated piezoelectrictransducer and scanning tunneling microscope having either the preferredstructure shown in FIG. 10 or the two arm structure shown in FIGS. 20and 22.

FIGS. 34(a) and (b) through 36(a) and (b) represent the types of X, Yand Z axis motion that can be achieved with single tip bimorphs havingthe structure shown in cross section in FIG. 10.

FIGS. 37(a) and (b) represent the types of rotational motion that can beachieved in two tip embodiments using a bimorph having the constructionshown in FIG. 10 to provide independent Z axis motion and synchronous Xand Y motion.

FIG. 38 is a diagrammatic view of an optical imaging storage system.

FIG. 39 is a block diagram of a system which uses a number ofpiezoelectric bimorph cantilevers for writing and reading information toand from recording surfaces.

FIG. 40 is a perspective view of a substrate on which are formed bysemiconductor integrated circuit techniques the imaging sensors andvarious components of a bimorph-cantilever and recording-surface memorysystem.

FIG. 41 is a perspective view of a substrate having input/outputterminals connected thereto.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Before discussing the details of the preferred and alternativeembodiments of the integrated piezoelectric transducer, a scanningtunneling microscope (STM) using this transducer and methods for makingthese structures, it would be helpful to understand the teachings of theinvention to explore the current state of the prior art in STM's. FIG. 1depicts a prior art scanning tunneling microscope system which can beintegrated according to the teachings of the invention. In FIG. 1, aconductive surface 10 having topographical features 12 and 14, etc., isscanned by a conductive tip 16. This tip is very narrow at its point,and preferably terminates in a single atom at the point 18.

The point 18 is scanned over the conductive surface 10 by apiezoelectric transducer 20. The purpose of this piezoelectrictransducer is to scan the tip over the surface by defining a pluralityof raster scan lines in the X-Y plane. The transducer 20 also moves thetip back and forth along the Z axis as the tip is scanned in the X-Yplane so as to maintain a distance between the tip 18 and the uppermostportion of the topographical feature over which the tip currentlyresides at a more or less constant distance. This distance is usuallyaround 1 to 10 angstroms, and must be within the overlap region of theprobability density functions of the electrons for the atoms in the tip18 and the atoms in the uppermost regions of the topographical featureover which the tip currently resides. As long as the distance betweenthe tip and the surface is within the overlap region of the probabilitydensity functions (tunneling range--usually less than 10 angstroms) anda bias voltage is applied across this junction, a tunneling current willflow between the tip 18 and the conductive surface. This tunnelingcurrent is symbolized by the arrow I_(T).

The magnitude of the tunneling current I_(T) is exponentially related tothe distance between the tip and the surface. The magnitude of thetunneling current will decrease when the distance becomes larger andincrease when the distance becomes smaller. To cause this tunnelingcurrent to flow, a bias voltage is applied between the tip 16 and theconductive surface 10 by a bias voltage source 22. A current sensor 24senses the magnitude of the tunneling current I_(T) and outputs afeedback signal on line 26 which is proportional to the magnitude of thetunneling current. A feedback circuit in control system 28 receives thisfeedback signal and generates suitable piezotransducer driving signalson the bus 30 to cause the piezoelectric transducer to move the tip 16in such a manner as to maintain the tunneling current I_(T) at arelatively constant value. The control system 28 also generates suitablepiezoelectric transducer driving signals on the bus 30 to cause the tip16 to be raster scanned across the conductive surface.

FIG. 2 is a diagram of a typical scanning tunneling microscope prior artstructure as developed by IBM and as discussed in the above cited IBMJournal of Research and Development. FIG. 2 shows the mechanical detailsof the structure. The microscope tip T is scanned over the surface of asample S with a piezoelectric tripod (X, Y, Z) in FIG. 2(a). A roughpositioner L brings the sample within reach of the tripod. A vibrationfilter system P protects the instrument from external vibrations. In theconstant tunneling current mode of operation, the voltage V_(Z) isapplied to the Z piezoelectric element by means of the control unit CUdepicted in FIG. 2(b). The control unit keeps the tunneling currentconstant while the tip is scanned across the surface by altering thecontrol voltages V_(X) and V_(Y). The trace of the tip generallyresembles the surface topography. Inhomogeneities in the electronicstructure of the sample's surface also produce structure in the tiptrace. This is illustrated on the right half of the sample S as twosurface atoms which have excess negative charge.

PROCESS #1

Referring to FIG. 3 there is shown an integrated structure representingan intermediate stage after the first several steps in a process formaking an integrated scanning tunneling microscope using an integratedpiezoelectric transducer. Fabrication starts with a substrate 32.Preferably this substrate is silicon or some other substrate suitablefor forming integrated electronic circuits. However, the substrate maybe any other material which is chemically, mechanically and thermallycompatible with the materials which will be formed on top of thesubstrate. It is preferable to make the substrate 32 of a semiconductormaterial so that the control circuitry which will be used to cause thetip movement via the piezoelectric bimorph can be formed on the samesubstrate as the bimorph itself.

The first step in the fabrication sequence is to deposit a spacer layer34 under the portion of the bimorph that is to be cantilevered. Thebimorph will be attached to the substrate at the end opposite the tip,so no spacer material is formed in this attachment region. This spacerlayer will later be removed to provide a space between the uppermostsurface (most positive Z coordinate) of the substrate 32 and theundersurface (most negative Z coordinate) of the piezoelectric bimorphwhich will be formed on top of the spacer layer 34. This will provide aclearance space for the piezoelectric bimorph to move along the Z axis.Preferably the spacer material is titanium, titanium/tungsten orpolyimide. This spacer layer must be of a material such that it can beselectively etched without having the etchant attack the material of thesubstrate 32 or the material of the overlying electrode andpiezoelectric material layers. This class of materials will be hereafterreferred to s the class 1 group of materials. Any material which can beselectively etched without attacking the materials of the other layerswill suffice for purposes of practicing the invention. Titanium/tungstenalloy (10% Ti: 90% W) is a class 1 material selectively etchable byhydrogen peroxide if the conductors are aluminum and the piezoelectricmaterial is zinc oxide. Polyimide is another example of a class 1material which can be selectively etched with an oxygen plasma. Thethickness of the spacer layer 34 should be adequate to providesufficient space for the bimorph to move in the negative Z direction.

Next, a layer of conductive material is deposited on top of the spacelayer. This layer of conductive material is photolithographicallypatterned and etched to form three electrodes 36, 38 and 40. The purposeof these electrodes will become clear later when the operation of theentire structure is detailed. Note, that although electrode 38 is shownto be more narrow than the electrodes 36 and 40 in the figures, inreality the electrodes 36, 38 and 40 are usually all the same size. Thisdoes not have to be the case however. The conductive layer from whichthe electrodes 36, 38 and 40 are formed is preferably of aluminum and isdeposited to 0.1 to 1.0μ thickness. The electrodes 36 and 40 arepatterned to be approximately 3μ wide each.

Referring to FIG. 4, there is shown another intermediate stage in thefabrication of the integrated piezoelectric scanning tunnelingmicroscope after the first layer of piezoelectric material has beendeposited. After formation of the first three electrodes, the next stepin the process is to deposit the first layer of piezoelectric materialover the entire surface of the chip. This layer 42 is zinc oxide in thepreferred embodiment of the structure and is deposited to 2μ thicknessby reactive sputtering in an oxygen ambient. Methods for depositing zincoxide are well known and are described in the following references whichare hereby incorporated by reference: Rozgonyi and Polito, Preparationof ZnO Thin Films By Sputtering of the Compound in Oxygen and Argon,Applied Physics Letters, pp. 220-223, Vol. 8, Number 9 (1966); Denburg,Wide-Bandwidth High-Coupling Sputtered ZnO Transducers on Sapphire, IEEETransactions On Sonics and Ultrasonics, pp. 31-35, Vol. SU-18, No. 1,(January 1971); Larson et al., RF Diode Sputtered ZnO Transducers, IEEETransactions on Sonics and Ultrasonics, pp. 18-22 (January 1972);Shiosaki et al., Low-Frequency Piezoelectric-Transducer Applications ofZnO Film, Applied Physics Lett., pp. 10-11, Vol. 35, No. 1, (Jul. 1,1974); Khuri-Yakub et al., Studies of the Optimum Conditions for Growthof RF-Sputtered ZnO Films, pp. 32676-3272, Journal of Applied Physics,Vol. 46, No. 8 (August 1975); Chen et al., Thin Film ZnO-MOS TransducerWith Virtually DC Response, pp. 945-948, 1985 Ultrasonics Symposium ofIEEE; Royuer et al., ZnO on Si Integrated Acoustic Sensor, pp. 357-362,Sensors and Actuators, 4 (1983); Kim et al., IC-Processed PiezoelectricMicrophone, pp. 467-8, IEEE Electron Device Letters, Vol. EDL-8, No. 10(October 1987). Next, a layer of conductive material 44 is depositedover the first piezoelectric layer 42. The purpose of this conductivelayer is to form a center electrode between the two layers ofpiezoelectric material which will be used to form the bimorph.Preferably, the layer 44 is aluminum and is deposited to 0.1 to 1.0μthickness. From this layer a center electrode is photolithographicallyformed to be approximately 10 to 200μ wide.

Referring to FIG. 5, there is shown another intermediate stage in thefabrication of the bimorph after the second piezoelectric layer has beendeposited. This second piezoelectric layer 46 is zinc oxide in thepreferred embodiment of the structure and is deposited to 2μ thickness.Next a layer of conductive material is deposited on top of the secondpiezoelectric layer 46. Preferably, this layer of conductive material isapproximately 0.1 to 1.0μ thick aluminum. In some embodiments, anadditional 1000 angstroms of gold is deposited on top of the aluminum.From this conductive layer, three electrodes 48, 50 and 52 are formed byphotolithographic patterning. These electrodes are aligned with thelocations of the electrodes 36, 38 and 40 and have the same widths asthose electrodes. Preferably, the electrodes 48, 50 and 52 are depositedusing lift-off techniques.

Referring to FIG. 6, there is shown an intermediate stage in the processof manufacture after the first few steps of the process of forming thetip on the center electrode 50 have been performed. Fabrication of metalcones by evaporation is not a new technique, but has been previouslydescribed by Spindt et al., J. Appl. Phys., 47, 5248 (1976). FIG. 6depicts an alternative embodiment of the tip formation process using anintegrated shadow mask.

Basically the process of forming a tip having sufficient sharpness isbest done through the use of a shadow mask. In FIG. 6, this shadow maskis formed from layers which are deposited over the uppermost group ofthree electrodes 48, 50 and 52. In the preferred embodiment of thestructure, a separate wafer is processed to form a shadow mask withalignment keys, and this separate wafer is placed over the structureshown in FIG. 5 by aligning the alignment keys on each wafer. Theseparate wafer and the structure of FIG. 5 are then processed to havelock and key physical characteristics such that the aperture in theshadow mask can be properly aligned over the center electrode 50. In thealternative embodiment shown in FIG. 6, the first step in forming theintegrated shadow mask is to deposit a layer 54 of the class 1 spacermaterial. Again, this layer 54 must be selectively etchable by anetchant which will not attack the material of the electrodes 48, 50 and52, or the zinc oxide of the layers 46 and 42. The layer of the spacermaterial 54 need not be the same type of material as used in the spacerlayer 34. However, the material of both of these layers must be withinthe class 1 group of materials. No patterning is performed on the layer54, and it is allowed to cover the entire structure. Next, a layer 56 ofa class 2 material, preferably copper, is deposited over the spacerlayer 54. A class 2 material is any material which may be selectivelyetched by an etchant which will not attack the class 1 material usedabove and below it and which can be etched away after tip formationwithout etching the material of the tip. In the preferred embodiment ofthe structure, the spacer layer 54 is 1000 angstroms oftitanium/tungsten alloy. The layer 56 of class 2 material is preferably2μ of copper. Next, a 5000 angstrom layer 58 of class 1 spacer materialis deposited over the class 2 layer 56.

FIG. 7 shows the integrated structure at an intermediate stage duringformation of the tip after etching of the spacer layer 58 andunderetching of the class 2 layer 56. The formation of the tip is doneby evaporation of a metal through a shadow mask aperture. This shadowmask aperture must be raised above the surface upon which the tip is tobe formed so that a cone of material may be built up before the shadowmask aperture is closed off by the deposition of the material on top ofthe shadow mask. In FIG. 7, the shadow mask is the layer 58 and theshadow mask aperture is the opening 60 in this layer. The opening 60 isformed by using a selective etchant for the class 1 material of layer 58and conventional photolithographic techniques. The aperture 60 isdefined to be 1-2μ and is centered over the center of the electrode 50.Generally, the size of the aperture 60 should be much smaller than thesize of the middle electrode 50. If the class 1 material of layer 58 istitanium/tungsten alloy, a suitable etchant for this selective etchingstep would be hydrogen peroxide.

After the aperture 60 is etched, the copper layer 56 must be etched backso as to underetch the perimeter of the aperture 60. The purpose forthis underetching step is to provide clearance space for the walls ofthe tip cone which is to be formed later. The underetching step of theclass 2 material of layer 56 is performed using a selective etchantwhich only attacks the class 2 material. If layer 56 is copper, thisetch is performed using the aperture 60 as a mask and using a mixture ofnitric acid, hydrogen peroxide, and water in a ratio of 10:1:100,respectively. That is, the etchant is 10 parts HNO₃ to 1 part H₂ O₂ to100 parts H₂ O.

Referring to FIG. 8, there is shown the state of the structure in theintermediate stage of construction after formation of the tip but beforeremoval of those layers which were formed in the process of forming thetip. Prior to the evaporation deposition of the tip material, a thirdetch step is performed to selectively etch through the class 1 materialof layer 54 to form an aperture over the center electrode 50. In someembodiments, a cleaning step will then be performed to clean the surfaceof the electrode 50 to prepare it for tip deposition. This is done tobetter insure adhesion of the tip material to the electrode 50. Theselective etching of the layer 54 is performed using a timed liquid etchor plasma etch to expose the top surface of the electrode 50. Thisetching step also etches a little of the layer 58 and all of layer 54down to the electrode 50. For this reason, the layer 58 should be formedat least twice as thick and preferably 3 times as thick as the layer 54.A timed sputter etch is used to clean the surface of electrode 50 ifneeded. Where the boundary of the aperture in the layer 54 is relativeto the boundary of the aperture in the layer 56 depends upon whether aliquid or plasma etch is used to etch the layer 54. The boundary of theaperture in the layer 54 will be collocated with the boundary of theaperture in the layer 56 for liquid etches and will be approximatelylocated with the boundary of the aperture 60 in the layer 58 if a plasmaetch in used.

Next, the tip 66 is formed. In the preferred embodiment of thestructure, this tip is formed by evaporation in vacuum of tantalum orsome other class 3 material. Any other material can be used for the tip66 if it has the characteristics of a third class of materials hereafterdefined. A class 3 material must be such that it does not oxidizeappreciably in air and it must be such that it will not be etched by theetchant used to selectively etch the class 2 material of layer 56.Tantalum is such a material if copper is selected for the layer 56.Other possible materials for the tip would be aluminum coated with anoble metal by evaporation. Alternatively, the tip can be a noble metalstanding alone, or any other conductor that can be selectively etched inthe manner described above.

The evaporation of the class 3 material 62 from a pont (approximately1-5 mm) located far (approximately 10 cm) above the surface results inthe formation of the layer 64. Note that as the evaporation continuesthrough the aperture 60, the aperture in the layer 64 slowly decreasesin diameter as evaporation continues due to condensation of theevaporated material on the sidewalls of the aperture. As the diameter ofthe aperture in the layer 64 continually decreases, so does the diameterof the cone of material in the tip 66 being formed beneath thisaperture. When the aperture in the layer 64 finally closes itself off,formation of the tip 66 is complete, and a very sharp tip (tip radiusless than 1000 angstroms) will have been fabricated.

Referring to FIG. 9, there is shown a cross section of the structure atan intermediate stage in the construction after lift-off of the shadowmask layers and deposition of a zinc oxide etch mask layer. Followingthe processing steps described with reference to FIG. 8, it is necessaryto remove the layers 54, 56, 58 and 64 so as to expose the tip 66. Thisis done using a lift-off etch to remove the class 2 material of layer56. This lift-off etch removes all the layers above layer 54, i.e., theclass 2 layer 56, the class 3 layer 64 and the class 1 layer 58.

Next, it is necessary to etch the piezoelectric layers 47 and 42 todefine the sidewalls of the bimorph cantilever beam. This is done byphotolithographically patterning the remaining layer 54 to serve as anetch mask for the zinc oxide as described previously. Layer 54 ispatterned to have the configuration shown in FIG. 9. Note that the edges70 and 72 of this layer are located along the X axis outside of theedges 74 and 76 of the metal electrode layer 44. The reason for thislocation is to insure that the edges 74 and 76 of the middle electrodeare completely encased in the zinc oxide of the layers 46 and 42. Thepurpose for this is to prevent leakage currents and arcing between theelectrodes 36, 40, 44, 48 and 52 which would lower the breakdownvoltages and prevent the device from operating at high voltages. Thepurpose of formation of the etch mask 68 is to improve the resolution ofthe etching of the piezoelectric layers 42 and 46. Etching ofpiezoelectric material such as zinc oxide using photoresist providesvery bad resolution as to the exact location of the edge of thepiezoelectric material relative to the edge of the photoresist. It hasbeen found that substantial improvements in the certainty of thelocation of this edge can be made by first forming an etch mask of theclass 1 material such as titanium/tungsten alloy and then using thisetch mask to guide the etching of the piezoelectric material. Thus,after the layer 68 is formed, a solution of 15 grams NaNO₃, 5 ml HNO₃and 600 ml H₂ O is used to etch the piezoelectric layers 46 and 42 backto the approximate location of the edges 70 and 72.

After the tip is exposed, and the piezoelectric layers are etched, thespacer layer 34 is selectively etched away to free the cantilever.

FIG. 10 shows in cross section the preferred final piezoelectric bimorphtransducer structure in integrated form according to the teachings ofthe invention after selective etching of the spacer material layers 34and the etch mask layer 54. Note the aperture 78 formed by the removalof the spacer layer 34. It is this void which allows the tip 66 to movealong the Z axis under the influence of the forces generated by thepiezoelectric material.

FIG. 11 shows a cross sectional view of the bimorph cantilever taken inthe Y-Z plane, whereas the cross section of FIG. 10 is taken in the X-Zplane. A plan view of the bimorph cantilever is shown in FIG. 12 lookingdown the Z axis at the X-Y plane. FIG. 12 shows the locations of thesections taken in FIGS. 10 and 11 as the section lines 10--10' and11--11', respectively. Note in FIG. 11 the cantilevered nature of thebimorph structure, the bimorph being attached to the substrate 32 onlyin the area 80. The relative dimension in FIG. 12 may be not trulyindicative of an actual design which would be commercially employed.Bonding pads 89, 91 and 93 are coupled by conductive paths to the twoelectrode pairs comprised of electrodes 48, 36 and 44. Bonding pads 97,99 and 101 are coupled by conductive paths to the two electrode pairscomprised of electrodes 52, 40 and 44. Bonding pad 95 is coupled byconductive paths to both the electrodes 50 and 38 and the tip 66. Inembodiments where the control circuitry is integrated on the substrate32, the bonding pads shown in FIG. 12 can be eliminated.

NECESSARY ADDITIONAL ELEMENTS NEEDED FOR AN STM

Referring again to FIG. 11, there are several additional elements of ascanning tunneling microscope system which are necessary for convertingthe cantilever bimorph piezoelectric transducer shown in FIG. 11 to asystem having multiple commercial applications. An overlying wafer 82having a conductive surface 84 is formed with a cavity 86 such that thewafer 82 may be physically attached to the substrate 32 with theconductive surface 84 overlying and within several microns of the end ofthe tip 66, such that the tip can be brought up to the surface 84 bybending of the bimorph. In the preferred embodiment of the scanningtunneling microscope (STM) structure, the wafer 82 may be Pyrex orsilicon, but, in alternative embodiments, the wafer 82 may be any othermaterial which is mechanically, thermally, and chemically compatiblewith the materials used in the rest of the structure. Preferably, thematerial of the wafer 82 should be such that a good bond may be madebetween the wafer 82 and the substrate 32, and such that suitableconvenient fabrication techniques are known which may be used to formthe cavity 82 and to attach a conducting surface 84 to the wafer 82. Instill other alternative embodiments, the wafer 82 may be itself aconductive material such that no separate conductive surface 84 needs tobe attached. In such embodiments, the cavity 86 should be such that theportion of the wafer 82 of interest is scanned by the tip 66. Also, theelectrodes 36, 38, 40, 44, 48, 50 and 52 will have conductive pathwaysformed through the piezoelectric layers and across the surface of thesubstrate 32 to bonding pads such that the appropriate voltages may beapplied to these electrodes to cause the tip 66 to scan in the desiredmanner. If these conductive pathways pass between the surface of thesubstrate 32 and the mating surface of the wafer 82, the materials forthese two structural elements must be selected such that the conductivepathways may be properly formed.

In some embodiments, the control circuitry to supply the bias current tothe tip 66 and to control the voltages applied to the various electrodeswill be integrated on the substrate 32. The block 88 represents theintegration of such known circuitry on the substrate in known manner.The position of the block 88 is illustrative only since this circuitrymay be integrated on the side of the substrate, in a recess in thesubstrate, or on the reverse side of the wafer opposite the side fromwhich the bimorph cantilever is formed. It is preferred to integrate thecircuitry at a location to minimize the complexity of routing thevarious signals and control voltages to the appropriate nodes of thecircuit.

The structure shown in FIG. 11 can be used for mass storage, microscopicphotolithography, imaging and other commercial applications.

Referring to FIG. 13, there is shown a schematic diagram of a crosssection through the bimorph cantilever to illustrate how the variouselectrodes are operated to cause movement of the cantilever in theCartesian coordinate system. The cross section of FIG. 13 has the sameorientation as the cross section 10--10' in FIG. 12. The vectors marked1, 2, 3 and 4 in FIG. 13 represent the electric field vectors existingbetween the four pairs of electrodes. The electric field vector 1represents the field between the electrode 52 and the center electrode44. The electric field vector 2 represents the field between the centerelectrode 44 and the outer electrode 40. The electric field vector 3represents the field between the electrode 48 and the center electrode44, and the electric field vector 4 represents the field between thecenter electrode 44 and the outer electrode 36. In each case, theelectric field is directly proportional to the potential differenceapplied to the pair of electrodes bounding the region of interest.

The nature of the piezoelectric zinc oxide is such that if a field isapplied in the Z direction (which is along the crystalographic C-axis ofthe material) that causes the material to contract along that axis, andthe material simultaneously expands along both the X and Y axes. Onlyexpansions or contractions along the Y axis cause any bending of thebimorph. Hence, the following discussion refers to the Y-axis motiononly.

Referring to FIG. 14, there is shown a table of the desired movements inthe Cartesian coordinate system having the axes oriented as shown to theleft of FIG. 13, said table correlating these desired movements torelative expansions in the piezoelectric material in accordance with therelationships given on the right half of the table. The manner in whichthe table of FIG. 14 is interpreted is as follows. If it is desired tocause movement of the bimorph of FIG. 13 in only the negative Xdirection, it is necessary to charge the electrodes 52 and 44, and 44and 40, respectively, such that the relative Y-axis expansion of thepiezoelectric material in the layers 46 and 42 between these two pairsof electrodes is equal. Further, it is necessary to charge theelectrodes 48 and 44, and 44 and 36 such that the Y-axis expansion ofthe piezoelectric material in the layers 46 and 42 between these twopairs of electrodes is also equal, but such that the Y-axis expansionbetween the electrode pairs 48 and 44, and 44 and 46, respectively, isless than the expansion between the electrodes 52 and 44, and 44 and 40,respectively. In other words, if one thinks of the vectors marked 1-4 inFIG. 13 as the relative magnitude of the Y-axis expansion of thepiezoelectric material in the layers 46 and 42 in the localized areasthrough which these vectors pass, then to obtain negative X movement ofthe bimorph, it is necessary that the expansions in areas 1 and 2 beequal and greater than the expansions in areas 3 and 4. This causesmovement of the bimorph in the negative X direction in the samemechanical fashion as a bimetallic strip works where on layer of metalin the bimetallic strip expands less than the other layer of metal. Thiscauses forces which tend to cause the strip to bend toward the stripwhich expands less. From FIG. 14, it is seen that for positive Xexpansion the situation is exactly opposite as the situation previouslydescribed. That is, the expansions in the areas 3 and 4 are equal andexceed the expansions in the areas 1 and 2. Likewise, for negative Ymovement, i.e., movement into the page of the tip 66, it is necessary tocharge the electrodes 48, 52, 44, 36 and 40 such that the piezoelectricmaterial in regions 1-4 all contract an equal amount. This contractionis signified as expansion less than zero. For positive Y movement, it isnecessary to charge the same electrode such that regions 1-4 all expandby the same amount which is signified by an expansion greater than zero.For positive Z movement, it is necessary to charge the electrodes suchthat regions 2 and 4 expand equally and greater than the expansion inregions 1 and 3. Likewise, for negative Z movement, it is necessary tocharge the electrode such that regions 1 and 3 expand an equal amountand greater than the expansion in regions 2 and 4.

It is possible to obtain any desired movement in the Cartesian spacedefined by the 3 axes coordinate system to the left of FIG. 13 bysuperimposing these relationships from any one axis upon therelationships for another axis. That is, if both negative X and positiveY movement is simultaneously required, the relationships from these twolines of the table of FIG. 14 are superimposed such that all fourregions are expanded equally by an amount A to obtain the desired Ycomponent with an additional expansion of regions 1 and 2 by an amount Bover the expansion of regions 3 and 4 to obtain the desired negative Xcomponent. Note that electrode 50 only serves as a signal connection tothe tip 66. The bottom electrode 38 is charged with the same biasvoltage applied to the top center electrode 50 and the tip to eliminateany spurious, parasitic movements caused by expansion or contraction inthe piezoelectric layer 46 under the center electrode 50. Any suchmovement is cancelled by the movements in the layer 42 caused by thecharge on the bottom center electrode 38.

PROCESS #2

Beginning at FIG. 15, the fabrication of the two arm bimorph embodimentof a piezoelectric transducer according to the teachings of theinvention is shown. Note that FIGS. 15 through 20 show a view of onebimorph lengthwise similar to the view shown in FIG. 11 of thetransducer built according to the previously described process.

Referring to FIG. 15, there is shown an intermediate stage in theprocess of making an arm of a two arm bimorph using a backside etchtechnique. A substrate 92 is chosen which is preferably a semiconductor,but which may also be, in alternative embodiments, other materialscapable of being micromachined. Semiconductor is desirable for thesubstrate so that control circuitry may be integrated on the same die asthe bimorph itself. The first step in the process is to grow a 500angstrom thick layer of silicon dioxide 94. Next, a 900 angstrom thicklayer of nitride (Si₃ N₄) is grown, and conventional photolithographytechniques are used to define and etch a hole through the oxide layer 94and nitride layer 96 to expose the surface of the substrate 92 as shownat 98.

Referring to FIG. 16, there is shown another intermediate stage in theconstruction of a two arm bimorph after etching of the cavity. Afterdefining the location of the aperture in the silicon dioxide and nitridelayers as shown in FIG. 15, a KOH etch is used to etch a 350 μ deeptrench in the substrate 92, using the nitride layer as an etch mask.This trench is shown at 100. Thereafter, the nitride layer 96 isstripped to leave only the silicon dioxide layer 94. Alignment marks arethen patterned into side A to allow alignment to the pattern on side B(see FIG. 15).

FIG. 17 shows another intermediate stage in the process after depositionof the first electrode layer. The next step is to deposit 0.1 to 1.0μ ofaluminum and to pattern it to form the electrode shown at 102.

FIG. 18 shows another intermediate stage after deposition of the firstpiezoelectric layer and formation of a center electrode. After formingthe electrode 102, a layer 104 of piezoelectric material is deposited.This layer is 2μ of zinc oxide or some other piezoelectric material.Next, a 0.1 to 1.0μ layer of aluminum is deposited and patterned andetched to form the center electrode 106.

Referring to FIG. 19, there is shown an intermediate stage in theconstruction of the two arm bimorph after the second layer ofpiezoelectric material and the top electrode has been formed. Afterforming the middle electrode 106, 2μ of piezoelectric material aredeposited in a layer 108. This layer is zinc oxide or some otherpiezoelectric material. Next, 0.1 to 1.0μ of aluminum and 1000 angstromsof gold are deposited over the piezoelectric layer 108. This layer ofconductive material is then patterned and formed using lift-offtechniques into the top electrode 110 and a tip electrode 112.

Referring to FIG. 20, there is shown another intermediate stage in theconstruction of the two arm bimorph after the tip has been formed andthe structure has been underetched to free the bimorph. The process forforming the tip 114 is the same as described with reference to FIG.3-10. After the tip is formed, the zinc oxide is patterned and etched toform the edge 116. This process is done using the same class 1 etch maskmaterial as was used in the process described with reference to FIGS.3-10. Finally, a plasma etch is used to etch through the remainingsubstrate 92 to the silicon dioxide layer 94 to free the bimorph armfrom attachment to the substrate 92 along the area 118.

FIG. 21 shows a cross section through the bimorph of FIG. 20 along thesection line 21--21' in FIG. 20. As can be seen from FIG. 21 only twopairs of electrodes exist in the bimorph of FIG. 21. These two pairs ofelectrodes are the electrode 110 and the electrode 106, and theelectrode 106 and the electrode 102, respectively. Those skilled in theart will appreciate that this structure will allow the bimorph to bendup and down along the Z axis and expand or contract longitudinally alongthe X axis.

In order to get 3 axis Cartesian coordinate movement, a second armhaving the structure shown in FIGS. 20 and 21 must be formed and joinedto the bimorph of FIGS. 20 and 21 at the location of the tip 114. A planview of the structure of this bimorph arrangement is shown in FIG. 22.

Referring to FIG. 22, the section line 20--20' indicates the position ofthe section through the structure of FIG. 22 as shown in FIG. 20. In thestructure shown in FIG. 22, two bimorph arms, 116 and 118, extend fromthe substrate 92 at right angles joined at the approximate location ofthe tip 114. The bimorph 116 can move the tip 114 up and down along theZ axis and longitudinally along the X axis. The bimorph 116 can move thetip up and down along the Z axis and longitudinally along the Y axis.The bimorph 118 has its three electrodes 110, 106 and 102 coupledrespectively to the bonding pads 120, 122 and 124. These connections aremade via electrical conductors 126, 128 and 130, which arephotolithographically formed simultaneously with the electrodes 110, 106and 102 on the surface of the substrate 92. The tip 114 is coupled by anelectrical conductor 132 to a bonding pad 134. The corresponding threeelectrodes of the bimorph 116 are coupled to bonding pads 136, 138 and140. In alternative embodiments, the circuitry to drive bias voltagesonto the six electrodes to cause movement of the tip and to bias the tip114 with a correct voltage could be integrated on the substrate 92thereby eliminating the need for the bonding pads shown at the bottom ofFIG. 22. In such an embodiment, bonding pads would be present for supplyof power to the circuitry used to bias the tip and drive the electrodes.

PROCESS #3--PREFERRED

The process described below is preferred to make either the one armpiezoelectric transducter having the structure of FIG. 10 or the two armbipod piezoelectric transducer shown in plan view in FIG. 22 and incross section in FIG. 20. Referring to FIG. 23, there is shown anintermediate stage in the preferred process for manufacturing a scanningtunneling microscope. The first step in the process is to clean a [100]silicon wafer of 380 micron thickness with a standard acid clean. Thedetails of this cleaning process are given in Appendix A which is adetailed process schedule for the preferred process. Next, a layer 136of silicon dioxide is thermally grown to a thickness of 5000 angstroms.Then, a layer 138 of silicon nitride is deposited to 1000 angstromsthickness over the silicon dioxide using low pressure chemical vapordeposition (LPCVD).

Referring to FIG. 24, there is shown the next stage in process afteretching the backside pit. To free the bimorph cantilever to be formedlater in the process, a backside etch is used. The first step in thisprocess is to etch a pit in the backside. Negative photoresist (notshown) is applied and patterned to define the location of the pit. Anoxygen plasma etch is then used to remove any remaining scum from theopening in the photoresist where the pit is to be formed. The details ofthis plasma etch are given in Appendix A. Next, the nitride layer 138 isetched using an SF₆ and F13B1 plasma etch at a ratio of 1:1. Then, theoxide layer 136 is etched using 6:1 buffered oxide etch solution (BOE).Following these two etch steps, the remaining photoresist (not shown) isremoved and the wafer is cleaned using the process detailed in theappendix. Then 340 microns of silicon from the substrate 140 are etchedaway using the nitride/oxide layers as an etch mask. This etch isperformed using a 30% KOH etch at 80 degrees C. The wafer is then rinsedin a 10:1 H₂ O:HCl solution, followed by a rinse in deionized water.This leaves the pit 142.

The substrate 140 has a polished front surface 144. Alignment marks areetched in this surface to facilitate the alignment of the variouspatterning steps to one another. FIG. 25 shows the wafer after thisalignment mark 146 has been etched. The procedure for forming thesealignment marks starts by patterning photoresist to define the positionsof the alignment marks 146. Then an oxygen plasma etch is used to descumthe openings and the nitride layer 138 and the oxide layer 136 areetched using the same procedure defined above in describing FIG. 24. Adeionized water rinse and nitrogen ambient dry cycle are performedfollowed by etching of 3 microns of silicon using a 1:1 SF₆ :C₂ ClF₅plasma etch. The wafer is then cleaned in accordance with the procedureoutlined in Appendix A, and the remaining photoresist is removed. Thelayer of nitride 138 is then stripped using concentrated H₃ PO₄ at 165degrees C. for 1 hour followed by a deionized water rinse and a nitrogenambient drying cycle.

The next stage is shown in FIG. 26. To deposit the bottom electrode 148,the pattern of the electrode is defined with a positive resist liftoffprocess. Then the metal of the electrode is deposited by electron-beamevaporation deposition of 1000 angstroms of aluminum at roomtemperature. The excess aluminum is lifted off by soaking the wafer inhot acetone. The wafer is then rinsed in fresh acetone, methanol anddeionized water and dryed in a nitrogen ambient.

FIG. 27 defines the next stage in the process. After deposition of thelower electrode, it is necessary to deposit the piezoelectric layer.This is done by first sputter cleaning the surface for 30 seconds andelectron beam evaporation deposition of 1000 angstroms of silicondioxide 150 on the substrate while holding the substrate at atemperature of 200 degrees C. Next, a 2 micron layer 152 of zinc oxideis sputter deposited using a zinc target in 5:1 O₂ :Ar gas ambient at 30mTorr. During this process, the substrate is held to 300 degrees C.Then, a 1000 angstrom layer 154 of silicon dioxide is deposited over thezinc oxide by E-beam evaporation with the substrate at 200 degrees C.

FIG. 28 shows the intermediate stage in the process after the middleelectrode is formed. To deposit the middle electrode 156, the patternfor the electrode is defined using mask #4 and positive resist and aliftoff technique. Next, a 1000 angstrom layer of aluminum is depositedby electron beam evaporation using a room temperature wafer holder. Theexcess aluminum is then lifted off by soaking the wafer in hot acetone.The wafer is then rinsed in fresh acetone, methanol and deionized waterfollowed by a drying cycle in nitrogen ambient.

FIG. 29 shows the stage of the process after the upper oxide layers havebeen deposited. The first step in this process is to sputter clean thewafer for 30 seconds. Next, 1000 angstroms of silicon dioxide 158 areE-beam evaporation deposited with the substrate held at 200 degrees C.The top layer of piezoelectric material 160 is formed by depositing 2microns of zinc oxide using a zinc target in a 5:1 mixture of oxygen andargon at 30 mTorr with the substrate at 300 degree C. Finally, a 1000angstrom layer 162 of silicon dioxide is E-beam evaporation depositedover the zinc oxide with the substrate at 200 degrees C.

FIG. 30 shows the state of the wafer after the top electrode is formed.The top electrode 164 is formed by defining the pattern using a positiveresist liftoff process. Then 500 angstroms of aluminum are depositedusing a room temperature wafer holder and E-beam evaporation. Thisdeposition is followed by an E-beam evaporation deposition of 500angstroms of gold using a room temperature wafer holder. The excess goldand aluminum are then lifted off by soaking the wafer in hot acetone.The wafer is then rinsed in fresh acetone, methanol and deionized waterand dryed in a nitrogen ambient.

FIG. 31 shows the wafer after the oxides have been patterned. The firststep in this process is to sputter deposit 3000 angstroms oftitanium/tungsten using an unheated wafer holder. Then the pattern forthe oxide is defined in the titanium/tungsten layer which is to be usedas an etch mask. This is done by defining the desired pattern inphotoresist deposited on the titanium/tungsten and etching thetitanium/tungsten layer using 30% H₂ O₂ for 30 minutes at roomtemperature. The wafer is then rinsed in deionized water and dryed in anitrogen ambient. Patterning of the oxides then begins with etching ofthe top silicon dioxide layer 162 using 6:1 buffered oxide etch,followed by a deionized water rinse. The upper zinc oxide layer 160 isthen etched in a solution comprised of: 15 grams of NaNO₃, 5 ml HNO₃,600 ml H₂ O followed by a deionized water rinse. The middle layer 158 ofsilicon dioxide is then etched in the same manner as the layer 162, andthe bottom layer 152 of zinc oxide is then etched using the samesolution makeup as was used to etch the top layer 160. The bottom layerof silicon dioxide 150 is then etched using the same solution makeupused to etch the other layers of silicon dioxide. The wafer is thenrinsed in deionized water and dryed. Next, 3 microns of silicon areremoved from the top of the wafer in regions where all upper layers havebeen removed to expose the silicon substrate. This is done using a 1:1SF₆ :C₂ ClF₅ plasma etch. The wafer is then cleaned and the resist isstripped using acetone, methanol and deionized water. The remainingtitanium/tungsten etch mask is then removed in 30% H₂ O₂ for 30 minutesat room temperature. The wafer is then rinsed in deionized water anddryed.

After the oxide layers are etched, the bonding pad metal is deposited bydefining the pattern by a positive photoresist liftoff process. Themetal is the deposited using E-beam evaporation of 1 micron of aluminumusing a room temperature wafer holder. The excess aluminum is thenlifted off by soaking the wafer in hot acetone. The wafer is then rinsedin fresh acetone, methanol and deionized water and dryed.

Next, the wafer side B is scribed using a diamond-tipped saw.

FIG. 32 shows the wafer after the shadow mask for tip formation has beenput into place and the tip deposition has taken place. First, the waferis sputter cleaned for 30 seconds. Then, a separate wafer is fabricatedto have the cross section shown in FIG. 32. This wafer has an aperture166 formed therein and has alignment marks that match the alignmentmarks 146. The wafer of the shadow mask 168 is then attached to thesubstrate 140 with alignment marks matched so as to locate the aperture166 over the desired location on the top electrode 164 for the tip 168.After, the shadow mask is in place, 5-10 microns of the desired tipmaterial, e.g., niobium or tantalum, are deposited through the aperture166 to form the tip 168. Note, that in the preferred embodiment, thestructure of FIG. 32 will be formed at multiple locations on the wafer,and only one shadow mask 168 will be used with multiple apertures at allthe desired tip locations for all the cantilevers. Finally, the shadowmask is carefully removed so as to not damage the tips.

Next, the cantilevers are separated from the substrate along part oftheir length. FIG. 33 shows the structure after this process has beenperformed. Separation is accomplished by depositing 10 microns ofpositive resist on side A of the wafer to protect the structure justdescribed. The wafer is then subjected to a backside etch to etchthrough the remaining silicon membrane at the bottom of the pit 142 bysubjecting side B of the wafer to a 3:1 SF₆ :C₂ ClF₅ plasma etch. Thedetails of this etch are specified in Appendix A. The photoresist isthen tripped using acetone, methanol and an air dry cycle. Theindividual die are then separated by cracking the wafer along the scribelines.

The presence of the silicon dioxide layer 136 has been found to promotebetter growth of the aluminum layer 148 which also improves the growthof zinc oxide layers 152 and 160. It also allows conductive paths to beformed beneath the cantilever without being shorted out by the metal ofthe layer 148. The presence of the silicon dioxide layers 150 and 158promotes better growth of the zinc oxide layers 152 and 160. Thepresence of the silicon dioxide layers 154 and 162 aids in balancingstresses in the cantilever which can build up during the depositionprocesses of forming the cantilever. That is, the same stresses willbuild up in the silicon dioxide layers 154 and 162 when they aredeposited as build up in the silicon dioxide layers 150 and 158 whenthey are deposited. Accordingly, the stresses are balanced. Also, thesilicon dioxide layers separating the pairs of electrodes increases thebreakdown voltage. In alternative embodiments, the silicon dioxidelayers may be omitted or other materials can be substituted.

The preferred method just described can be used to make either the"one-arm" or bipod type of piezoelectric transducer. The principaldifference between these two different structures is in the number ofelectrode pairs that are formed inside each integrated cantilever. Theone arm type of bimorph needs to have at least four pairs of electrodesformed to obtain 3 axis movement. If the one arm type of integratedtransducer is to be used for a scanning tunneling microscope, 6 pairs ofelectrodes must be formed so that electrical connection can be made tothe tip and the spurious piezo effects by this tip electrode can becancelled out. For a two arm bipod type of transducer, only two pairs ofelectrodes need be formed in each bimorph arm. Obvious modifications tothe above described process for the steps of forming the top electrode148 and the bottom electrode 164 can be made depending upon the type ofintegrated piezoelectric transducer to be fabricated.

Referring to FIGS. 34(a) and (b) through 36(a) and (b) there areillustrated the movements which may be achieved with a one arm bimorphintegrated piezoelectric transducer with the electrode structure shownin FIG. 10. The (a) and (b) illustrations of each figure depict both thepositive and negative movements on the associated axis. FIGS. 37(a) and(b) illustrate the type of rotational movement which be achieved for twotip embodiments to have independent Z-axis movement for each tip. Thetips move together along the Y and X axes however.

Typical performance parameters are as follows. If a dipod structure isconsidered with aluminum electrodes one micron thick and zinc oxidelayers which are two microns thick, and the legs are each 1000 micronslong and 100 microns wide, then the bipod will be able to move the tip20 angstroms per volt in the X and Y axes and 0.6 microns per volt inthe Z axis. The breakdown voltage is 30 volts and the scannable area is600 angstroms by 600 angstroms or 360,000 square angstroms. If a singlearm cantilever bimorph with the same dimensions as given in thisparagraph is considered, 200 angstroms per volt of movement in the Xaxis and 20 angstroms per volt in the Y axis can be achieved. Movementof 0.6 angstroms per volt in the Z axis can be achieved. Thus, thescannable area for the single arm bimorph is 10 times larger than thedipod since the X axis movement is ten times greater per volt. Thebimorph design must be such that the tip can be moved within tunnelingrange of the conductive surface for STM applications.

One purpose of this invention is to reduce the size of the storage unitbelow that which is possible with magnetic tape storage unit. In asystem according to the invention, the storage unit is so small that theentire combination of CCD array, analog-to-digital converters storageunit, and associated control electronics can fit inside of the housingof a 35 mm camera. In effect, we replace the photographic film with astorage unit with sufficient capacity to store multiple images similarto that now being stored on a roll of photographic film. In turn, weplay back the images on a convention VCR as an alternative to developingthe film as is done in present systems.

FIG. 38, in diagrammatic form, shows a system 200 which consists of aconventional lens system 202 for focusing the optical image onto a CCDarray 204, the two-dimensional CCD for converting the optical image intolinear train of electrical signals, a conventional analog-to-digitalconverter 206 for converting the electrical signals into a stream ofdigital pulses, and a storage unit 208.

It is the storage unit which is the novel feature of this invention. Wewill focus our attention on that component. A digital storage unit ofthe type that we envision is made possible with the micro-STM--aScanning Tunneling Microscope miniaturized to the level where it can fiton a singe silicon chip as described hereinabove. We propose to use thisdevice, not for imaging, but for "writing" and "reading" digitalinformation on the surface of a suitable substrate. One bit is stored inan area that measures 10 nanometers on a side. The images that we wantto store can be described as a frame of pixels--512×512--with each pixelconsisting of 8 bits of information. To store one image we require astorage unit that has the capacity to store 262,144 bytes ofinformation. Each byte consists of 8 bits and we, therefore, need tostore 2,097,152 bits. This requires that we have the capacity to store asquare array with 1,448 bits on each side, that is, approximately 1,500bits on a side. The bits are placed 10 nm on centers and this means asquare array of 1,500 bits requires an area 15 microns×15 microns. Thisarea is considerably smaller than the size of the silicon chip used forthe micro-STM, which measures 2 mm on a side. It follows that onemicron-STM could be used to write and read one optical image. A 5×5element array of micro-STM's is used to store 25 images--a number thatis not too different from what is on an ordinary roll of film. Ourstorage unit consists of an array of STM's on a common substrate whichmeasures typically 1 cm. in diameter.

The physical mechanism for storing digital information on the substratemay take on a variety of forms. All of these are now under developmentin research laboratories. All use the STM or AFM to write and read.These include the following:

(1) Storage of trapped charge in thin dielectric films analogous to thestorage mechanism used in conventional semiconducting memories.

(2) Storage of information in the form of micro-domains in magneticfilms where the information is read with a spin dependent tunneling.

(3) Writing by deposition of atomic species on the substrate in a mannercontrolled by the tip. This takes a variety of forms such as:

a) deposition from an organo-metallic vapor where the energy fordecomposing the vapor comes from the tunneling electrons;

b) electroplating a small area using the electric field of the tip toplate ions onto a suitable substrate from an electrolyte;

c) deposition or polymerization-in-place of a suitable vapor such aswith phenyl;

d) development of a thin photoresist such as PMMA with the electronsfrom a tip;

e) manipulation of single atoms on a Germanium substrate;

f) direct marking, or deformation, of a gold surface where the STM isimmersed in an insulating oil or grease to allow the tip voltage to be 3volts which is sufficiently intense to create a mark on the gold surfaceso that the mark can be read by scanning the area with a much reducedvoltage on the tip.

An Atomic Force Microscope--as constructed with the same technology thatis used to construct the micro-STM--is also used to create andsubsequently read micro domains in magnetic substrates.

FIG. 39 shows a system 210 which includes a number of recording surfaces(typically shown as 212) and a number of piezoelectric bimorphcantilevers (typically shown as 214) forming blocks of memory, orinformation storage, devices. A control subsystem 216 includes circuitsfor controlling the position of the tips of the cantilever arms as itscans the surface of a recording surface. In addition, circuits areprovided for writing and reading information to and from the recordingsurfaces. Information is inputed through an input interface circuit 218from sensor devices 220. The sensors include, for example, chargecontrol devices (CCD). The input interface circuit 218 includes ananalog-to-digital converter for converting the analog CCD output signalsto a digital format. An output interface circuit 222 is provided fordigital-to-analog conversion of stored digital signals to formatssuitable for display or for control of another device.

FIG. 40 shows an embodiment of an imaging system 230 mounted onsubstrate 232 which is, for example, a silicon substrate. Image sensors234 are formed on the substrate. A number of block memory cells 236formed from microminiature scanning tunneling microscopes are arrangedin parallel rows on the substrate. Associated with each set of memorycells are amplifier (typically shown as 238). Control circuits 240 areprovided on the same substrate for controlling of read/write operationand for scanning of the cantilever tips over the memory surfaces.

FIG. 41 shows an embodiment of a system in which the components aremounted or formed in a single substrate. Various terminals 242 areprovided for providing input and output information from and to,respectively, for example, the sensors 220 and display or controldevices 224 of FIG. 39.

Although the invention has been described in terms of the preferred andalternative embodiments detailed herein, those skilled in the art willappreciate many modifications which may be made without departing fromthe spirit and scope of the invention. All such modifications areintended to be included within the scope of the claims appended hereto.

                                      APPENDIX A                                  __________________________________________________________________________    Preferred Planar STM Process                                                  __________________________________________________________________________      Deposition of mask materials                                                1a.  Clean 380 μm thick (100) wafer using standard acid clean***           1b.  Thermally grow 5000Å SiO.sub.2                                       1c.  Deposit 100Å Si.sub.3 M.sub.4 using LPCVD                              Etch KOH pits from backside (rough surface, side B)                         2a.  Using mask #1 and negative photoresist, define KOH squares               2b.  Oxygen plasma* for 1 min to `Descum` openings                            2c.  Etch Si.sub.3 N.sub.4 using SF.sub.6 and F13B1 (1:1) plasma etch         2d.  Etch SiO.sub.2 layer using 6:1 buffered Oxide Etch (BOE)                 2e.  Strip photoresist and clean wafer**                                      2e.  Etch 340 μm of silicon from backside using 30& KOH at 80°           C.                                                                       2f.  Rinse wafer using 10:1 H.sub.2 O:HCl solution                            2g.  Rinse in de-ionized water (DI) then dry in N.sub.2                         Etch Alignment marks on frontside (polished side, side A)                   3a.  Using mask #2 and positive resist, define alignment marks                3b.  Oxygen plasma* for 1 min to `Descum`  opeinings                          3c.  Etch Si.sub.3 N.sub.4 using SF.sub.6 and F13B1 (1:1) plasma* etch        3d.  Etch SiO.sub.2 layer using 6:1 buffered Oxide Etch (BOE)                 3e.  Rinse in DI then dry in N.sub.2                                          3f.  Etch 3 μm of Si using 1:1 SF.sub.6 :C.sub.2 ClF.sub.5 plasma               etch                                                                     3g.  Clean wafer using standard acid clean (strip resist)**                   3h.  Strip Si.sub.3 N.sub.4 using concentrated H.sub.3 PO.sub.4 @                  165° C. for 1 hr                                                  3i.  Rinse in DI then dry in N.sub.2                                            Deposit bottom electrodes                                                   4a.  Define pattern w/mask #3, positive resist and liftoff process            4b.  E-beam evaporate 1000Å Al using room temp. wafer holder              4c.  "Liftoff" excess Al by soaking wafer in hot Acetone                      4d.  Rinse wafer in fresh Acetone, Methanol, and DI, then dry in N.sub.2        Deposit lower oxides                                                        5a.  Sputter clean surface, 30 sec                                            5b.  E-beam evaporate 1000Å SiO.sub.2 substrate is heated to                   200° C.                                                           5c.  Sputter deposit 2 μm ZnO using Zn target in 5:1 O.sub.2 :Ar gas,           30 m Torr.                                                                    Substrate held to 300° C.                                         5d.  E-beam evaporate 1000Å SiO.sub.2 is heated to 200° C.           Deposit middle electrodes                                                   6a.  Define pattern w/mask #4, positive resist and liftoff process            6b.  E-beam evaporate 1000Å Al using cold wafer holder                    6c.  "Liftoff" excess Al by soaking wafer in hot Acetone                      6d.  Rinse wafer in fresh Acetone, Methanol, and DI, then dry in N.sub.2        Deposit upper oxides                                                        7a.  Sputter clean surface, 30 sec                                            7b.  E-beam evaporate 1000Å SiO.sub.2 substrate is held to                     200° C.                                                           7c.  Sputter deposit 2 μm ZnO using Zn target in 5:1 O.sub.2 :Ar gas,           30 m Torr.                                                                    Substrate held to 300° C.                                         7d.  E-beam evaporate 1000Å SiO.sub.2 is held to 200° C.             Deposit Top electrodes                                                      8a.  Define pattern w/mask #5, positive resist and liftoff process            8b.  E-beam evaporate 500Å Al using room temp. wafer holder               8c.  E-beam evaporate 500Å  Au (Gold) using room temp. wafer holder       8d.  "Liftoff" excess Al and Au by soaking wafer in hot Acetone               8e.  Rinse wafer in fresh Acetone, Methanol, and DI, then dry in N.sub.2        Pattern ZnO                                                                 9a.  Sputter deposit 3000Å T1/W using room temp. wafer holder             9b.  Define pattern w/mask #6, positive resist                                9c.  Pattern Ti/W using 30% H.sub.2 O.sub.2, 30 min @ room temp.              9d.  Rinse in DI then dry in N.sub.2                                          9e.  Etch top layer SiO.sub.2 using 6:1 BOE (1 min), Rinse in DI              9f.  Etch upper ZnO in following solution: 15 g NaNO3, 5 ml HNO3, 600 ml           H.sub.2 O, Rinse in DI                                                   9g.  Etch middle layer SiO.sub.2 using 6:1 BOE (2 min), Rinse in DI           9h.  Etch lower ZnO in following solution: 15 g NaNO3, 5 ml HNO3, 600 ml           H.sub.2 O, Rinse in DI                                                   9i.  Etch bottom layer SiO.sub.2 using 6:1 BOE (1 min),                       9j.  Rinse in DI then dry in N.sub.2                                          9k.  Etch 3 μm of Si using 1:1 SF.sub.6 C.sub.2 ClF.sub. 5 plasma               etch                                                                     9l.  Clean wafer, strip resist using Acetone, Methanol, and DI                9m.  Strip Ti/W in 30% H.sub.2 O.sub.2 (30 min @ room temp.)                  9n.  Rinse in DI then dry in N.sub.2                                          10.                                                                             Deposit bonding pad metal                                                   10a. Define pattern w/mask #7, positive resist and liftoff process            10b. E-Beam evaporate 1.0 μm Al using room temp. wafer holder              10c. "Liftoff" excess by Al soaking wafer in hot Acetone                      10d. Rinse wafer in fresh Acetone, Methanolm and DI then dry in N.sub.2         Scribe wafer on Side B using saw                                              Deposit Tips                                                                12a. Sputter clean surface for 30 seconds                                     12b. Place shadow mask on top of wafer, align to pattern using `key`               formed                                                                        with Al/ZnO/Al/ZnO/Au pattern                                            12c. Deposit 5-10 μm Niobium, forming pointed tips                         12d. Carefully remove shadow mask, avoid damaging tips                          Separate cantilevers from substrate                                         13a. Deposit 10 μm layer positive resit on Side A                          13b. Etch through Si membrane from sibe B using 3:1 SF.sub. 6 :C.sub.2             ClF.sub.5 Plasma*                                                             etch                                                                     13c. Strip photoresist in Acetone & Methanol, air dry                           Separate dies (or `chips`) by cracking wafer along scibe                    __________________________________________________________________________      lines                                                                        *All plasma etches are performed using Power = 500 W at 200 mTorr pressur     for 6 min, unless otherwise stated                                            **Standard clean for removing negative photoresist                            **a. Agitate vigorously in 120° C. 10:1 H.sub.2 SO.sub.4 :H.sub.2      O.sub.2 for 20 min                                                            **b. Rinse in DI                                                              **c. Soak in 4:1:1 H.sub.2 O:H.sub.2 SO.sub.4 :H.sub.2 O.sub.2 at             90° C. for 20 min                                                      **d. Rinse in DI then dry in N.sub.2                                          ***Standard PreOxidation Clean                                                ***a. Perform above clean (*Standard clean for removing negative              photoresist)                                                                  ***b. Soak in 10:1:1 H.sub.2 O:HCl:H.sub.2 O.sub.2 at 90° C. for 2     min                                                                           ***c. Rinse in DI                                                             ***d. Soak in 10:1:1 H.sub.2 O:NH.sub.4 OH:H.sub.2 O.sub.2 at 90°      C. for 20 min                                                                 ***e. Rinse in DI                                                             ***f. Dip in 50:1 BOE for 30 sec at 23°  C. (ambient)                  ***g. Rinse in DI then dry in N.sub.2                                    

We claim:
 1. An integrated memory device, comprising:a substrate; arecording surface having a recording medium associated therewith forstoring information at various locations on said recording surface, saidrecording surface fixed with respect to said substrate; a piezoelectricbimorph cantilever attached to said substrate at one end and having afree end with a tip fixed thereto, said bimorph cantilever including twolayers of piezoelectric material sandwiched between multiple pairs ofelectrodes in such a manner that three axis movement of said bimorphcantilever is caused by applying suitable potentials to said multiplepairs of electrodes; and control means coupled to said multiple pairs ofelectrodes of the piezoelectric bimorph cantilever, for adjusting thepotentials applied between those pairs of electrodes so as to scan saidtip over the recording surface to access the various locations on saidrecording surface.
 2. The memory device of claim 1 wherein saidrecording surface includes a thin dielectric film for storing trappedcharge.
 3. The memory device of claim 1 wherein said recording surfaceincludes magnetic films for storing information.
 4. The memory device ofclaim 1 wherein said recording surface and said piezoelectric bimorphcantilever operate as a scanning tunneling microscope.
 5. The memorydevice of claim 1 wherein said recording surface and said piezoelectricbimorph cantilever operate as an atomic force microscope.
 6. The memorydevice of claim 1 including a plurality of recording surfaces, eachhaving a piezoelectric bimorph cantilever associated therewith.
 7. Amemory device for writing in or reading out information, comprising:apiezoelectric bimorph cantilever having a tip, said piezoelectricbimorph cantilever including two layers of piezoelectric materialsandwiched between multiple pairs of electrodes in such a manner thatthree axis movement of said piezoelectric bimorph cantilever is causedby applying suitable potentials to said multiple pairs of electrodes; amemory surface for storing information at a plurality of storagelocations on said memory surface; wherein said piezoelectric bimorphcantilever and said memory surface form an integrated device with saidpiezoelectric bimorph cantilever mounted at a fixed position relative tosaid memory surface; control means coupled to said multiple pairs ofelectrodes of the piezoelectric bimorph cantilever, for adjusting thepotentials applied between those pairs of electrodes so as to scan thetip of said piezoelectric bimorph cantilever over the memory surface toalign said tip with each of said storage locations on said memorysurface; means coupled to said piezoelectric bimorph cantilever's tipfor writing information in each of said storage locations; and meanscoupled to said piezoelectric bimorph cantilever's tip for reading outinformation stored in each of said storage locations.
 8. The memorydevice of claim 7 wherein said means for writing information includesmeans for operating said piezoelectric bimorph cantilever and saidmemory surface as a scanning tunneling microscope.
 9. The memory deviceof claim 7 wherein the means for reading information and the means forwriting information are coupled, respectively, to input terminals andoutput terminals.
 10. A memory device, comprising:a piezoelectricbimorph cantilever having a tip, said piezoelectric bimorph cantileverincluding two layers of piezoelectric material sandwiched betweenmultiple pairs of electrodes in such a manner that three axis movementof said piezoelectric bimorph cantilever is caused by applying suitablepotentials to said multiple pairs of electrodes; a memory surface forstoring information at a plurality of storage locations on said memorysurface; wherein said piezoelectric bimorph cantilever and said memorysurface form an integrated device with said piezoelectric bimorphcantilever mounted at a fixed position relative to said memory surface;control means coupled to said multiple pairs of electrodes of thepiezoelectric bimorph cantilever, for adjusting the potentials appliedbetween those pairs of electrodes so as to scan the tip of saidpiezoelectric bimorph cantilever over the memory surface to align saidtip with each of said storage locations on said memory surface; andmeans coupled to said piezoelectric bimorph cantilever's tip for readingout information stored in each of said storage locations.
 11. The memorydevice of claim 10, including means for operating said piezoelectricbimorph cantilever and said memory surface as a scanning tunnelingmicroscope.
 12. A memory device, comprising:a piezoelectric bimorphcantilever having a tip, said piezoelectric bimorph cantilever includingtwo layers of piezoelectric material sandwiched between multiple pairsof electrodes in such a manner that three axis movement of saidpiezoelectric bimorph cantilever is caused by applying suitablepotentials to said multiple pairs of electrodes; a memory surface forstoring information at a plurality of storage locations on said memorysurface; wherein said memory surface and said piezoelectric bimorphcantilever are mounted on a common substrate; control means coupled tosaid multiple pairs of electrodes of the piezoelectric bimorphcantilever, for adjusting the potentials applied between those pairs ofelectrodes so as to scan the tip of said piezoelectric bimorphcantilever over the memory surface to align said tip with each of saidstorage locations on said memory surface; and means coupled to saidpiezoelectric bimorph cantilever's tip for reading out informationstored in each of said storage locations.
 13. The memory device of claim12, including means coupled to said piezoelectric bimorph cantilever'stip for writing information in each of said storage locations, saidmeans for writing information including means, located on said commonsubstrate, for providing said information to said means for writinginformation.
 14. The memory device of claim 13 wherein said means forproviding information includes means for sensing images.